Fpga trading systems

Download PDF of this White Paper. The open source FIX Engine, QuickFIX is accelerated using Field Programmable Gate Array FPGA technology. The acceleration is performed by an FPGA based network card which is optimized for QuickFIX. The latency from the Order Cancel trigger to when the first byte is on the wire is nanoseconds.

The latency from the Order Cancel trigger to when the first FIX Order Cancel message is entirely on the wire is 1, nanoseconds. The majority of trading is increasingly done electronically using computers; see Figure 1. Peak trading periods provide among the best trading opportunities for profits trading also present the largest risk for potential losses. During peak trading periods, market data that trading systems must consume and process trading to the point trading trading systems slow down and become ineffective.

High Frequency Trading Trading is impacting market dynamics and generated interesting debates. For some, HFT is a relative term. What is called HFT today may be the fpga form of trading in the future. It is possible that a trading firm using an FPGA based Order Cancel system could have exited the market faster than any other trading firm — thereby reducing losses on days such as this one; see Figure 2 below. Financial firms communicate market and trade data via messaging standards such as the FIX protocol.

The Systems Information eXchange FIX Protocol is fpga messaging standard for the real-time electronic exchange of securities transactions. The FIX standard is managed by FIX Protocol Limited FPLan international non-profit standards body with members from all aspects of the financial services industry.

Software known as FIX Engines are used to process and generate FIX messages. QuickFIX is the de facto fpga source FIX Engine. Financial firms are turning to High Performance Computing HPC technology to provide that extra advantage over their competitors. Every level of software is optimized, and in recent years, firms are optimizing the hardware of their trading systems through the use of reconfigurable hardware. Reconfigurable hardware such as Field Programmable Gate Array FPGA technology is used to optimize trading systems at the network level.

FPGAs can aid in the generation fpga processing of network data thereby offloading certain tasks from the software of a system. The most common usage of FPGAs in finance is Market Data Handling. Systems can have up to cores for processing data in parallel and do not have the jitter introduced by operating systems and instruction fetching. An FPGA is programmed using a Hardware Description Language HDL such as Verilog or VHDL.

Not all algorithms can be implemented on an FPGA. This is partly due to the nature of FPGAs as a technology and also due to the low fpga aspect of HDL. HDL coding can result in development times of 3 to 5 times more if the algorithm can even be implemented on an FPGA. These languages are difficult to learn and result in very lengthy source code files that often accomplish very little with a lot of effort.

For example, the VHDL code for calculating the square root of a number can take anywhere from lines to lines of code. The FIX Protocol is string based, lending itself to large benefits from an FPGA. String functions are among the least efficient in trading CPU.

PXI PCI eXtensions for Instrumentation is an open and standardized computer bus using the CompactPCI form factor. PXI is based on the PCI bus with integrated timing and synchronization that is used to route clocks and triggers internally.

PXI was developed in and launched in Today, PXI is governed by the PXI Systems Alliance PXISAa group of more than 70 companies chartered to fpga the PXI standard, ensure interoperability, and maintain the PXI specification.

PXISA is also responsible for the PXI Express bus which is based on the PCI Express computer bus found in newer computers. PXI systems are composed of three basic components — chassis, controller, and peripheral trading. For example, an 18 slot 19 inch systems chassis holds one controller and 17 single slot modules.

The controller contains laptop sized components for compactness and can run Windows, Linux, and various real-time operating systems. There are 3U and 6U modules. Since PXI is based on standard PC technologies such as Windows and the PCI bus, integrating a PXI system to these systems is similar to integrating these systems systems a PC.

PXI also supports a broad range of Compact PCI products as they are both based on the same form factor. The PXI bus combines the systems PCI bus with timing and synchronization. The PXI trigger bus consists of 8 shared trigger bus lines, a low-skew star trigger, and a common 10 MHz system reference clock.

Using these synchronization features, one can pass trigger, clock, and other signals between PXI modules to make the accurate, high-performance measurements. FlexRIO is a PXI and PXI Express based reconfigurable hardware platform developed by National Instruments. It features two parts: FlexRIO field-programmable gate array FPGA modules and FlexRIO adapter modules. Together, they form a high-performance, reconfigurable hardware system programmable with LabVIEW FPGA software and without Hardware Description Language HDL fpga knowledge.

FlexRIO FPGA modules utilize a Virtex-5 FPGA with up to MB of onboard DDR2 DRAM. PXI FlexRIO modules have three 3 DMA channels for high-speed data streaming while the PXI Express FlexRIO modules have sixteen 16 DMA channels. All lines are routed with controlled-impedance, matched-length traces, and the differential pairs are routed together. Peer-to-Peer Data Streaming is unique to Fpga Express NI FlexRIO FPGA modules. This allows banks of up to four 4 PXI Express NI FlexRIO FPGA cards to systems communicate with each other.

Up to 16 such streams are supported, simplifying complex multi-FPGA communication schemes without taxing host CPU resources. FlexRIO cards have RTSI, or Real Time Signal Systems, which enables cards to be synchronized using the PXI bus. RTSI enabled devices can communicate directly over a low latency electrical connection. NI FlexRIO FPGA modules are accessible by Windows, Linux, PharLap, and VxWorks Operating Systems via the NI RIO drivers; version 3.

FlexRIO Adapter modules from National Instruments and third parties interface with FlexRIO FPGA modules through a card-edge connector that routes the necessary FPGA signals to the adapter module. Custom adapter modules can be developed with the NI FlexRIO Adapter Module Development Trading MDK.

FPGAs are field programmable which saves on development and modification costs. Prior to FPGAs, custom logic required schematic design which led to Register Level Transfer RTL. RTL which was replaced by Verilog and VHDL. Increased FPGA capacity requires a higher level of abstraction. In the past decade, industry has developed High Level HDLs. This allows for more complex algorithms to be implemented in a more timely fashion.

Complex financial algorithms can be programmed onto FPGAs without in-depth knowledge of digital design or complex Electronic Design Automation EDA tools. LabVIEW is distinctly suited for FPGA programming because it provides an intuitive depiction of the inherent parallelism that FPGAs provide.

Using a high level, graphical development environment see Figure 5 of LabVIEW FPGA reduces development time without compromising the performance gains of using an FPGA. Under the hood, the LabVIEW FPGA module uses code generation techniques to synthesize the graphical development environment to FPGA hardware which ultimately runs the FPGA synthesis tools. The single-cycle timed loops SCTL in LabVIEW FPGA provide a level of determinism guaranteed to execute within a specified time period of at least trading MHz.

In this paper, a SCTL running at MHz was used. Custom hardware can be used to create unique timing and triggering routines, ultrahigh-speed control, interfacing to digital protocols and applications requiring high-speed hardware reliability and tight determinism. A broker-dealer is connected to an exchange. The trade messages between the broker-dealer and the exchange use the FIX protocol format. The broker-dealer submits orders which the exchange seeks to match. All orders from the broker-dealer are open until a matching order enters the exchange.

Matched orders are sent back to the broker-dealer as executed. It is assumed that the detected event is one which will cause many other broker-dealers to wish to cancel their open orders at the same systems, so time would be of the essence and those who cancel first will reduce their potential losses.

See Figure 6 below. This was implemented using two computers connected directly via a cross over Ethernet cable. They communicate using FIX 4. Both computers are running Microsoft Windows XP on Intel x86 CPUs. One computer represents the Broker-Dealer, and the other the Exchange. The Broker-Dealer sends to the Exchange several buy or sell orders such that they do not execute. Upon detection of a trigger, the Broker-Dealer sends FIX Order Cancel messages for all open orders.

The Broker-Dealer computer is comprised of a computer connected to a NI PXI 5-Slot PXI Chassis with Integrated MXI-Express Controller. Two PXI cards are plugged into the PXI chassis; a FlexRIO PXI FPGA card with a Xilinx Virtex-5 LX85 FPGA and a NI PXIE DAQ card.

The FlexRIO card has a Prevas Mimas Gigabit Ethernet Adapter which has two RJ connectors. The FlexRIO and Prevas Mimas adapter combine to function as the Network Interface Card NIC of the Broker-Dealer computer.

All network traffic goes through the FlexRIO card and one of the ports of the Prevas Mimas Dual Gigabit adapter the other port is unused for this application. The Ethernet frames come into the Xilinx Virtex-5 LX85 FPGA in the form of bytes U8.

Under normal conditions, the Fpga FPGA card allows the layer 2 Ethernet frame data to go out via the Prevas Mimas adapter and in by passing it into the PXI bus so fpga it is accessible by programs that interface to the NI RIO drivers.

The NI PXIE Data Acquisition card was used to receive and transfer the Cancel Orders trigger. Trading of the PXI RTSI lines was used to make a direct electrical connection between this and the FlexRIO FPGA card. This is read trading in hardware with no interaction by the computer or the software. The Exchange computer is comprised of another computer running an unmodified version of QuickFIX running in server mode. Network interfacing is done via the native Gigabit Ethernet port.

Its function is to hold an order open until either a matching one arrives, or the order is cancelled. It sends them to the Exchange computer which holds them as open orders. Whenever any aspect of the open orders changes on the Broker-Dealer, the FPGA receives a copy of the cancellation information for each open order.

Below is a sample FIX 4. Pressing the button connected to the PXIE DAQ card generates a Cancel Orders trigger, which causes the FPGA to generate one FIX Order Cancel message for each of the open systems. The FIX message s are then injected into the live TCP session that already exists between the Broker-Dealer and Exchange machines.

The Exchange computer receives the FIX Order Cancel messages, not realizing that those messages were created by the FPGA [and not by QuickFIX on the Broker-Dealer computer] it cancels all orders referenced as if the Broker-Dealer instructed it to do so. As the final payload is being transferred to the PHY, the Ethernet frame and CRC is also calculated by the FPGA.

Field Programmable Gate Array FPGA technology has been established for Market Data and is now finding applications such as trade message generation. Trade volume and data increases are outpacing trading system technology. Financial fpga seek to optimize every aspect of the trading system. Until recently, software has been the focus of optimizations. Using off the shelf FPGA boards and a High Level Hardware Description Language HDL such as LabVIEW FPGA, one can develop hardware accelerated trading system with managed risk and costs.

PXI is a platform for FPGA based solutions that can integrate IEEEv2 timestamps from a GPS time source and latency measurements. PXI Express FPGA boards can efficiently communicate amongst themselves [without the host CPU] using Peer-to-Peer Data Streaming to provide multi-FPGA trading systems. Financial firms can now optimize both software and hardware of their trading systems to provide further differentiation and increase their competitiveness.

Wall Street FPGA, LLC www. Wall Street FPGA, LLC combines knowledge of capital markets and disruptive technology.

For more information and to schedule a demonstration, contact Terry Stratoudakis: Wall Street FPGA, LLC is a member of the FIX Protocol Limited.

Current projects include hardware acceleration of trading systems, market data analysis, and order entry as well as low latency measurement systems. Terry is serving as Executive Director of Wall Street FPGA, LLC.

Terry is the co-founder of ALE System Integration, a National Instruments Certified Partner. He worked at Underwriters Laboratories UL designing automated systems for product safety testing; the systems interfaced with enterprise systems as well as a wide range of equipment. He taught instrumentation as an Assistant Adjunct Professor at the New York City College trading Technology.

Terry holds a Masters of Science and Bachelors of Science in Electrical Engineering from Polytechnic University located in Brooklyn, New York NYU-Poly. He is a New York State licensed Professional Engineer and a National Instruments Certified LabVIEW Architect and Certified Professional Instructor.

He is a member of the Trading Technical Committee GTCHigh Frequency Trading Working Group, and Inter-Party Latency Working Group of the FIX Protocol Limited FPL. Wall Street FPGA low latency, high throughput. Introduction The majority of trading is increasingly done electronically using computers; see Figure 1.

Reconfigurable Hardware Reconfigurable hardware such as Field Programmable Gate Array FPGA technology is used to optimize trading systems at the network level. Technology Platform The technologies used in this system are PXI, FlexRIO, and LabVIEW FPGA. PXI PXI PCI eXtensions for Instrumentation is an open and standardized computer bus using the CompactPCI form factor. FlexRIO FlexRIO is a PXI and PXI Express based reconfigurable hardware platform developed by National Instruments. NI FlexRIO FPGA Modules FlexRIO FPGA modules utilize a Virtex-5 FPGA with up to MB of onboard DDR2 DRAM.

Figure 3 — FlexRIO FPGA Module FlexRIO Adapter Modules FlexRIO Adapter modules from National Instruments and third parties interface with FlexRIO FPGA modules through a card-edge connector that routes the necessary FPGA signals to the adapter module. In this paper the Prevas Systems Gigabit Ethernet Adapter is used, see Figure 4 below. Figure 4 — Prevas Mimas connected to NI FlexRIO Module LabVIEW FPGA FPGAs are field programmable which saves on development and modification costs.

Scenario A broker-dealer is connected to an exchange. Systems This was implemented using two computers connected directly via a cross over Ethernet cable. Broker-Dealer Computer The Broker-Dealer computer is comprised of a computer connected to a NI PXI 5-Slot Fpga Chassis with Integrated MXI-Express Controller. Exchange Computer The Exchange computer is comprised of another computer running an unmodified version of QuickFIX running in systems mode.

Conclusion Field Programmable Gate Array FPGA technology has been established for Market Data and is now finding applications such as trade message generation. About Wall Street FPGA, LLC Wall Street FPGA, LLC www. The Author Terry Stratoudakis Terry Stratoudakis, P.

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